/**
  ******************************************************************************
  * @file    gt32f030_misc.c
  * @author  GT Application Team
  * @version V1.0.0
  * @date    03-January-2025      
  ******************************************************************************
  * @attention
  *
  * <h2><center>&copy; COPYRIGHT 2022 Giantec Semicondutor Inc</center></h2>
  *
  *             http://www.giantec-semi.com/
  *
  * Unless required by applicable law or agreed to in writing, software 
  * distributed under the License is distributed on an "AS IS" BASIS, 
  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  * See the License for the specific language governing permissions and
  * limitations under the License.
  *
  ******************************************************************************
  */

/* Includes ------------------------------------------------------------------*/
#include "gt32f030.h"
#include "gt32f030_misc.h"

/** @addtogroup GT32F030_StdPeriph_Driver
  * @{
  */
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/



void SWDIO_Cmd(unsigned int io_mux)
{
	assert_param(IS_RCC_IOMUX(io_mux));
	if (io_mux)  //AFR_or_GPIO
  {
		RCC->REGLOCK= 0x55aa6699;
		RCC->SWIOCR = 0x5a690001;
		RCC->REGLOCK= 0;
  }
  else   //SWD
  {
		RCC->REGLOCK= 0x55aa6699;
		RCC->SWIOCR = 0x5a690000;
		RCC->REGLOCK= 0;
  }	
}

void RSTIO_Cmd(unsigned int io_mux)
{
	assert_param(IS_RCC_IOMUX(io_mux));
	if (io_mux)  //AFR_or_GPIO
  {
		RCC->REGLOCK= 0x55aa6699;
		RCC->RSTIOCR = 0x3c810001;
		RCC->REGLOCK= 0;
  }
  else  //Reset_pad
  {
		RCC->REGLOCK= 0x55aa6699;
		RCC->RSTIOCR = 0x3c810000;
		RCC->REGLOCK= 0;
  }	
}

/**
  * @}
  */ 
/************************ (C) COPYRIGHT Giantec Semicondutor Inc *****END OF FILE****/
